Clocking Circuits
Here are some Clocking Circuits which GHz Circuits has designed for customers
~14GHz LCVCO based PLL in TSMC40G to generate ~7GHz quadrature clocks for 100GBASE-LR4 transceiver. Integrated jitter after applying CDR transfer function was 175fs over range of 100kHz to Nyquist
8 GHz LC DCO in UMC40LP for successful delivery into a Digital PLL IP, where the total jitter at PLL output is specified to be less than 200fs over integration range 10kHz to 700MHz.
800MHz CDR PLL with phase interpolator to output 64 phases, for 10G Ethernet applications
50-250MHz spread spectrum clock generator with -0.5% to -4% programmability
A phase vernier DLL structure comprising of a master DLL and multiple auxillary DLLs for phase shifting clock or data (5 bit control) over frequency range 100MHz to 1GHz for use in source synchronous IO data communication
High fidelity crystal oscillators for various applications
~14GHz LCVCO based PLL in TSMC40G to generate ~7GHz quadrature clocks for 100GBASE-LR4 transceiver. Integrated jitter after applying CDR transfer function was 175fs over range of 100kHz to Nyquist
8 GHz LC DCO in UMC40LP for successful delivery into a Digital PLL IP, where the total jitter at PLL output is specified to be less than 200fs over integration range 10kHz to 700MHz.
800MHz CDR PLL with phase interpolator to output 64 phases, for 10G Ethernet applications
50-250MHz spread spectrum clock generator with -0.5% to -4% programmability
A phase vernier DLL structure comprising of a master DLL and multiple auxillary DLLs for phase shifting clock or data (5 bit control) over frequency range 100MHz to 1GHz for use in source synchronous IO data communication
High fidelity crystal oscillators for various applications